Premium
Analysis of ESD protection networks for DMOS power transistors by means of static and time‐resolved emission microscopy
Author(s) -
Bonati Bruno,
Canclini Athos,
Cavone Marianna,
Novarini Enrico,
Pavan Paolo,
Rivoir Roberto,
Stucchi Michele,
Zai Enrico
Publication year - 1993
Publication title -
quality and reliability engineering international
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.913
H-Index - 62
eISSN - 1099-1638
pISSN - 0748-8017
DOI - 10.1002/qre.4680090413
Subject(s) - zener diode , current crowding , transistor , synchronism , electrostatic discharge , materials science , diode , power semiconductor device , electrical engineering , optoelectronics , voltage , engineering , current (fluid)
Different ESD input/output protection networks, based on Zener diodes and lateral npn transistors have been implemented with the aim of characterizing their effectiveness in protecting vertical DMOS power transistors. Failure mechanisms have been identified by means of static emission microscopy. Gated emission microscopy, in synchronism with a voltage pulse emulating the ESD event, enables the dynamic behaviour of protection structures to be analysed, identifying lateral current crowding effects which explain the observed failure mechanisms.