Premium
In‐Memory Stateful Logic Computing Using Memristors: Gate, Calculation, and Application
Author(s) -
Xu Nuo,
Park Taegyun,
Yoon Kyung Jean,
Hwang Cheol Seong
Publication year - 2021
Publication title -
physica status solidi (rrl) – rapid research letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.786
H-Index - 68
eISSN - 1862-6270
pISSN - 1862-6254
DOI - 10.1002/pssr.202100208
Subject(s) - stateful firewall , computer science , in memory processing , memristor , logic gate , logic family , logic optimization , von neumann architecture , logic synthesis , theoretical computer science , computer architecture , algorithm , electronic engineering , programming language , engineering , computer network , information retrieval , network packet , query by example , web search query , search engine
Combining Boolean logic and nonvolatile memory functions, memristor‐based stateful logic circuits can minimize data movement during the computing process to achieve futuristic in‐memory computing. This may solve the problem of the von Neumann bottleneck in the current computing architecture. Herein, the recent developments in memristor‐based stateful logic computation are discussed from several perspectives, including the device, circuit, operational principles, and applications. Stateful logic gates correspond to in‐memory logic gates, with the inputs and outputs having identical physical entities, such as resistance. The developments in stateful logic primitive gates reported in the past decade are summarized. The influential factors in their actual implementation for stateful logic computation are also discussed. Then, methods for allocating the logic gates into the crossbar array are explained, which are for implementing the complex computing instances in the crossbar array. Finally, several data‐intensive applications achieved using the in‐memory computing method are discussed for the practical application of stateful logic in future computing systems.