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Poly‐GeSn Junctionless Thin‐Film Transistors on Insulators Fabricated at Low Temperatures via Pulsed Laser Annealing
Author(s) -
Zhang Lu,
Hong Haiyang,
Yu Chunyu,
Li Cheng,
Chen Songyan,
Huang Wei,
Wang Jianyuan,
Wang Hao
Publication year - 2019
Publication title -
physica status solidi (rrl) – rapid research letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.786
H-Index - 68
eISSN - 1862-6270
pISSN - 1862-6254
DOI - 10.1002/pssr.201900420
Subject(s) - materials science , thin film transistor , annealing (glass) , optoelectronics , passivation , transistor , thin film , laser , crystallite , nanotechnology , optics , layer (electronics) , composite material , electrical engineering , physics , engineering , voltage , metallurgy
High‐performance polycrystalline GeSn (poly‐GeSn) junctionless thin‐film transistors (JL‐TFTs) are proposed and fabricated at low process temperatures. Poly‐GeSn thin films with a Sn fraction of 4.8% are prepared using cosputtering and pulsed laser annealing (PLA) techniques. The ultra‐rapid nonequilibrium thermodynamic process with 25 ns PLA renders a good crystal GeSn thin film at a low temperature. The I ON / I OFF ratio increases by three orders of magnitude with GeSn channel thickness varying from 60 to 10 nm, suggesting that switch‐off current is dominated by depletion width. A superior effective mobility of 54 cm 2 V −1 s −1 is achieved for the JL‐TFT with a 10 nm‐thick GeSn film as a consequence of gate/channel interface passivation by oxygen plasma.