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Saddle‐shape warpage of thick 3C‐SiC wafer: Effect of nonuniform intrinsic stress and stacking faults
Author(s) -
Sun Yu,
Izumi Satoshi,
Sakai Shinsuke,
Yagi Kuniaki,
Nagasawa Hiroyuki
Publication year - 2012
Publication title -
physica status solidi (b)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.51
H-Index - 109
eISSN - 1521-3951
pISSN - 0370-1972
DOI - 10.1002/pssb.201147341
Subject(s) - materials science , wafer , stacking , stacking fault , stress (linguistics) , composite material , perpendicular , silicon carbide , silicon , curvature , anisotropy , compressive strength , optoelectronics , optics , geometry , nuclear magnetic resonance , dislocation , linguistics , philosophy , physics , mathematics
The technique of thick cubic silicon carbide (3C‐SiC) film (up to 300 µm) deposition on undulant‐Si substrates is very effective in reducing stacking faults and other planar defects of 3C‐SiC wafers. However, after removing the Si substrate, 3C‐SiC wafers show anisotropic warpage involving large convex curvature in the direction perpendicular to the ridge of undulation and slight concave curvature in the parallel direction, i.e., saddle shape. In this paper, we have discussed the origin of the warpage of 3C‐SiC wafers. From ex situ curvature measurements and stress calculation, we found that large compressive intrinsic stress was generated during high‐temperature growth (1623 K) in both parallel and perpendicular directions. To investigate the intrinsic stress distribution along the 3C‐SiC film thickness direction, we performed reactive ion etching (RIE) on 3C‐SiC film and determined the dependence of the SiC/Si system curvature on the remaining 3C‐SiC thickness. The intrinsic stress component perpendicular to the ridge of undulation showed nonuniform distribution along the film thickness. Below the 50 µm thickness region, the distribution presented large variation. The obtained intrinsic stress distribution was very similar to the stacking fault distribution, which showed high density near the SiC/Si interface and rapidly decreased within 50 µm apart from the interface. The simulation by finite element method (FEM) has clearly explained that the anisotropic warpage of SiC wafer was led by the intrinsic stress distribution in a quantitative manner. Microstructure changes induced by the stacking fault reduction process (stacking fault collision) would be the cause of the intrinsic stress variation.