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Carrier Transport in Graphene Field‐Effect Transistors on Gated Polar Nitride Substrates
Author(s) -
Balasubramanian Krishna,
Chandrasekar Hareesh,
Raghavan Srinivasan
Publication year - 2020
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201900949
Subject(s) - graphene , materials science , dielectric , substrate (aquarium) , field effect transistor , electron mobility , scattering , optoelectronics , carrier scattering , chemical vapor deposition , semiconductor , oxide , transistor , phonon scattering , condensed matter physics , phonon , nanotechnology , optics , composite material , thermal conductivity , oceanography , physics , quantum mechanics , voltage , metallurgy , geology
Large‐area, complementary metal–oxide semiconductor‐compatible substrates for high‐performance graphene‐based electronic devices are desired and AlN is a promising candidate with high dielectric constant and low surface phonon densities. An informed choice of substrate needs to consider the simultaneous effects of the two major substrate‐induced scattering mechanisms—remote impurity scattering and remote interfacial phonon scattering. Herein, the effects of such an interplay with fundamentally different electron and hole transport characteristics in chemical vapor deposition (CVD)‐grown monolayer graphene field‐effect transistors (FETs) on AlN thin films are demonstrated, due to the polar and piezoelectric nature of AlN. Temperature‐dependent measurements not only reveal a cross‐over in mobility, with graphene FETs on AlN having larger mobilities than SiO 2 at higher temperatures, but also an asymmetry between the cross‐over temperature for the electron and hole branches. Theoretical transport model using appropriate densities of charged impurities in both cases is shown to match well with the experimental results. These results highlight the role of the actual charge configurations within thin‐film dielectric substrates on carrier transport in practically realizable graphene FETs, which can be further generalized to other 2D material systems.