Analysis of Process‐Dependent Electrical Properties of Silicon Heterojunction Solar Cells by Quantum Efficiency and Temperature‐Dependent Current Density–Voltage Measurements

Amorphous silicon–crystalline silicon (a‐Si:H/c‐Si) heterojunction solar cells are fabricated by infrared (IR) radiative or resistive preheating of silicon wafers before the a‐Si:H layers deposition. The cells with IR radiative or resistive preheating lead to without S‐shape (WoS) or with S‐shape (WS) in their light current density–voltage ( J–V ) characteristics, respectively. The Suns‐ V oc analysis shows no front/back metal contact barriers for minority carriers in both cells. The light‐ and voltage‐bias‐dependent quantum efficiencies of the WS cell show the hindrance of carrier collection at the a‐Si:H/c‐Si interface due to the band offset, whereas more defective a‐Si:H layers are observed in the WoS cell. The WS and WoS cells' temperature‐dependent dark J – V characteristics reveal that the carrier transport is through tunnel‐assisted recombination and tunneling, respectively. The IR preheating of wafers results in the reduction of the bandgap of a‐Si:H and facilitates for minimizing the band offset at the interface, whereas, the resistive heating shows the relatively better a‐Si:H/c‐Si interface passivation.