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Inductively Coupled Plasma Chemical Vapor Deposition for Silicon‐Based Technology Compatible with Low‐Temperature (≤220 °C) Flexible Substrates
Author(s) -
Yang Kai,
De Sagazan Olivier,
Pichon Laurent,
Salaün Anne-Claire,
Coulon Nathalie
Publication year - 2020
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201900556
Subject(s) - materials science , silicon , chemical vapor deposition , thin film transistor , optoelectronics , fabrication , silicon dioxide , capacitor , inductively coupled plasma , annealing (glass) , analytical chemistry (journal) , nanotechnology , plasma , voltage , electrical engineering , layer (electronics) , chemistry , metallurgy , medicine , alternative medicine , engineering , physics , pathology , quantum mechanics , chromatography
Herein, an inductively coupled plasma chemical vapor deposition (CVD) (ICP‐CVD) technique is adopted for deposition of silicon dioxide and silicon thin films to fabricate metal–oxide–semiconductor (MOS) capacitors and thin film transistors (TFTs). Prior to the fabrication and characterization of the TFTs, C – V measurements and breakdown tests are conducted on MOS capacitors based on silicon dioxide deposited under temperatures as low as 20 °C. The breakdown field of 9 MV cm −1 is validated afterward, which implies the good electrical insulating property for acting as a gate insulator and the feasibility of the TFTs. After going through forming gas and thermal annealing with the highest temperature of 220 °C, the TFTs yield good gate insulating properties, a threshold voltage of 3.7 V, an on/off ratio of 6.4 × 10 2 , field effect mobility of 1.2 cm 2 (V s) −1 , and a subthreshold slope of 3.9 V dec −1 . They show promising electrical properties under such a low‐temperature fabrication process using ICP‐CVD technique compatible for silicon electronics using low‐cost flexible substrates.