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Thin Film Logic Circuits with Amorphous SiInZnO Channel Layer Annealed at Different Atmospheres for Next‐Generation Integrated Circuits
Author(s) -
Lee Byeong Hyeon,
Lee Sang Yeol
Publication year - 2018
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201700732
Subject(s) - materials science , thin film transistor , electronic circuit , optoelectronics , amorphous solid , logic gate , nand gate , thin film , oxide thin film transistor , transistor , threshold voltage , annealing (glass) , nanotechnology , electrical engineering , layer (electronics) , voltage , engineering , composite material , chemistry , organic chemistry
In this study, amorphous‐oxide‐based thin film logic circuits are fabricated using only an n‐type silicon‐indium‐zinc‐oxide (a‐SIZO) active channel layer annealed at different atmospheres (N 2 or air). More carriers are present in the N 2 atmosphere than in the air because the number of oxygen vacancies ( V O ) formed is higher. The inverters (NOT logic circuits) are simply fabricated by adopting different V th , adjusted by using different annealing atmospheres. The inverters have high voltage gain values of 11.64 and 9.99 at V DD = 5 V. A higher gain is obtained when the thin film transistor annealed in N 2 is used in the enhancement mode. The reason for this is closely related to the subthreshold slope value. Furthermore, more complex n‐type‐based NAND and NOR thin‐film circuits are fabricated by simply adopting different annealing atmospheres, and are confirmed to operate like the logic gates. This simple fabrication method of thin‐film logic circuits can open up the possibility for the implementation of next‐generation integrated circuits.