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Bias Temperature Instability of Normally‐Off GaN MIS‐FET with Low‐Pressure Chemical Vapor Deposition SiN x Gate Dielectric
Author(s) -
Hua Mengyuan,
Qian Qingkai,
Wei Jin,
Zhang Zhaofu,
Tang Gaofei,
Chen Kevin J.
Publication year - 2018
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201700641
Subject(s) - materials science , gate dielectric , threshold voltage , chemical vapor deposition , optoelectronics , trapping , dielectric , instability , transistor , field effect transistor , noise (video) , analytical chemistry (journal) , voltage , electrical engineering , chemistry , physics , ecology , mechanics , biology , engineering , chromatography , artificial intelligence , computer science , image (mathematics)
In this work, characterizations are conducted to investigate the threshold voltage ( V TH ) stability of the normally‐off GaN metal–insulator–semiconductor (MIS‐) field‐effect transistor (FET) with fully recessed gate structure and highly reliable low‐pressure chemical vapor deposition SiN x gate dielectric. We conducted bias‐temperature instability (BTI) tests under both positive and negative gate bias. We demonstrated the highly stable V TH of the high‐performance MIS‐FETs with small BTI, which benefits from the effective interfacial protection layer. More specifically, combining the BTI tests and drain current 1/ f noise analysis, we present extensive investigation of the physical origins of BTI. According to the experimental evidence and analysis, we ascribe the V TH instability to the trapping/detrapping of the pre‐existing trap states located at the SiN x /GaN interface and/or in the gate dielectric.