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Effects of grain boundary and grain orientation on electrical behavior of polycrystalline ferroelectric field effect transistor
Author(s) -
Wang Fang,
Li Bo,
Xu Baolei,
Liu Longfei,
Ou Yun,
Tian Li,
Wang Wei
Publication year - 2017
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201700277
Subject(s) - materials science , grain boundary , ferroelectricity , condensed matter physics , crystallite , field effect transistor , polarization (electrochemistry) , coercivity , grain boundary diffusion coefficient , transistor , composite material , optoelectronics , metallurgy , electrical engineering , voltage , physics , dielectric , microstructure , chemistry , engineering
The effects of grain boundary thickness and grain orientation on the electrical behavior of a ferroelectric field effect transistor with a polycrystalline gate are investigated using a phase field model in conjunction with the basic device equations of the field effect transistor. It is found that the grain boundary and grain orientation have a significant effect on the C–V relation curve and the output characteristic curve through the remnant polarization value and the coercive field of polycrystalline ferroelectric thin film. The grain orientation and grain boundary cause the memory window of the C – V relation curves to narrow. And the grain orientation and grain boundary have an influence on the on/off state source‐drain current, decrease their on‐off ratio of the output characteristics curves in the ferroelectric field effect transistor.

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