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Influence of crystal defect density of silicon wafers on potential‐induced degradation (PID) in solar cells and modules
Author(s) -
Gou Xianfang,
Li Xiaoyan,
Yu Jingwen,
Wang Shaoliang,
Zhang Xin,
Zhou Su,
Fan Weitao,
Huang Qingsong
Publication year - 2017
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201700006
Subject(s) - wafer , pid controller , degradation (telecommunications) , materials science , silicon , optoelectronics , crystalline silicon , solar cell , electronic engineering , mechanical engineering , engineering , temperature control
Potential‐induced degradation (PID) was recently identified as one of the most important degradation mechanisms. It can be due to many different reasons during the manufacture and application of solar energy system. In this study, the effect of defect density of silicon wafers on the PID phenomenon is revealed by PID simulation tests at both the cell and module levels. Silicon wafers of the same and different crystal structures with various defect densities are studied, respectively. The results, which are coincident, showed that the extent of PID has a positive correlation with defect density. The increased defect density can lead to a drastic decline in R sh , finally promoting the PID phenomenon. Silicon wafers with the lowest defect density demonstrate the least current leakage and highest PID resistance after PID simulation tests. Therefore, the result of this study shows the correlation between the PID strength of solar cells and defect density of silicon wafers, which can be easily measured during wafer manufacture.