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Non‐volatile memory devices based on Ge nanocrystals
Author(s) -
Vasilache Dan,
Cismaru Alina,
Dragoman Mircea,
Stavarache Ionel,
Palade Catalin,
Lepadatu AnaMaria,
Ciurea Magdalena Lidia
Publication year - 2016
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201532376
Subject(s) - materials science , non volatile memory , wafer , optoelectronics , nanocrystal , fabrication , annealing (glass) , thermal oxidation , oxide , hysteresis , sputter deposition , layer (electronics) , nanotechnology , sputtering , silicon , thin film , composite material , medicine , alternative medicine , physics , pathology , quantum mechanics , metallurgy
The article presents the fabrication and characterization of NV (non‐volatile) memory devices based on SiO 2 /Ge/SiO 2 trilayer structures on Si wafers. The trilayer structures were obtained by using the magnetron sputtering method for the deposition of gate SiO 2 and intermediate Ge layers and the rapid thermal oxidation for the growth of tunnel SiO 2 layer. Rapid thermal annealing was performed for obtaining Ge nanocrystals embedded in the SiO 2 gate oxide, as charge‐storage elements. Two NV cross bar memory structures based on two cell sizes of 300 × 300 and 100 × 100 μm 2 were manufactured. Capacity–voltage curves were measured on the memory devices, at different frequencies in the 1 kHz–10 MHz range at room temperature (RT) for evidencing the hysteresis loops and for showing that the devices keep memory in time at these frequencies. We have obtained capacity–voltage hysteresis curves with large memory window up to 2 V. We demonstrate that the trilayer structure SiO 2 /Ge/SiO 2 /on Si with Ge NCs embedded in the SiO 2 gate oxide is suitable for NV memory applications having a large number of cells.