z-logo
Premium
ZnO TFTs prepared by chemical bath deposition technique with high‐ k La 2 O 3 gate dielectric annealed in ambient atmosphere
Author(s) -
Gogoi Paragjyoti,
Saikia Rajib,
Saikia Dipok,
Dutta Ronen Prakash,
Changmai Sanjib
Publication year - 2015
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.201431605
Subject(s) - thin film transistor , materials science , dielectric , gate dielectric , optoelectronics , torr , electrode , threshold voltage , high κ dielectric , gate oxide , field effect , transistor , analytical chemistry (journal) , electrical engineering , voltage , nanotechnology , chemistry , layer (electronics) , physics , engineering , thermodynamics , chromatography
In this paper, the electrical properties of top‐gated thin‐film transistors with low‐cost chemical bath deposition (CBD) of ZnO as active material and a high‐ k rare‐earth oxide La 2 O 3 as gate dielectric have been reported. The source‐drain and gate electrodes and dielectric layers are fabricated by thermal evaporation techniques in high vacuum of the order of 10 −6  Torr in a coplanar electrode structure. The channel length of the TFT is of 50 μm. The fabricated TFTs are annealed at 500 °C in air. The TFTs exhibit a field effect mobility 0.58 (cm 2  V −1  s −1 ). Use of a high dielectric constant (high‐ k ) gate insulator reduces the threshold voltage and subthreshold swing of the TFTs. The TFTs exhibit a low threshold voltage of 4 V. The calculated values of gain–bandwidth product and subthreshold swing are also evaluated and presented. The ON/OFF ratio of the TFT is found to be 10 6 .

This content is not available in your region!

Continue researching here.

Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom