Premium
Passivation study of the amorphous–crystalline silicon interface formed using DC saddle‐field glow discharge
Author(s) -
Bahardoust Barzin,
Chutinan Alongkarn,
Leong Keith,
Gougam Adel B.,
Yeghikyan Davit,
Kosteski Tome,
Kherani Nazir P.,
Zukotynski Stefan
Publication year - 2010
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.200982803
Subject(s) - passivation , carrier lifetime , annealing (glass) , materials science , heterojunction , wafer , analytical chemistry (journal) , electric field , silicon , optoelectronics , charge carrier , nanotechnology , chemistry , composite material , physics , chromatography , quantum mechanics , layer (electronics)
The DC saddle‐field (DCSF) glow discharge method was used to deposit intrinsic a‐Si:H onto c‐Si to passivate the c‐Si surface. The effective minority carrier lifetime in the heterostructures as a function of the excess minority carrier density in the c‐Si wafers was measured. The results were then analyzed in the context of recombination associated with interface defect states using three known recombination models. The defect density and the charge density at the interface are inferred. In addition subsequent annealing of the samples was studied. It is shown that for our intrinsic a‐Si:H samples improvements in surface passivation are directly correlated with the reduction of interface defects and not the reduction of minority carrier concentration at the interface due to electric field. We have achieved excellent surface passivation with effective carrier lifetime >4 ms for an intrinsic a‐Si:H sample deposited at a process temperature of 200 °C and thickness of about 30 nm. It is also demonstrated that subsequent annealing, at 240 °C, of the samples which were prepared at process temperatures <240 °C greatly increases the effective lifetime.