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Reliability issues of SiC power MOSFETs toward high junction temperature operation
Author(s) -
Tanimoto Satoshi,
Ohashi Hiromichi
Publication year - 2009
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.200925167
Subject(s) - reliability (semiconductor) , materials science , junction temperature , optoelectronics , dielectric , fabrication , metal gate , delamination (geology) , electrical engineering , power semiconductor device , power (physics) , engineering physics , gate dielectric , silicon carbide , composite material , gate oxide , transistor , engineering , voltage , physics , medicine , paleontology , alternative medicine , subduction , pathology , quantum mechanics , biology , tectonics
There still remain a number of reliability problems to be resolved with regard to long‐term high junction temperature operation of SiC power devices because at present they simply follow Si‐based technology. In this paper, various reliability issues for power DMOS devices on 4H‐SiC operated at a junction temperature of more than 200 °C are extensively discussed in terms of five manifest problems and potential treats: (1) interlayer dielectric erosion, (2) Al spearing, (3) Ni 2 Si contact disappearance, (4) electrode delamination, and (5) gate time‐dependent dielectric breakdown. Preventive measures for these issues are proposed, including the use of a Ta/TaN barrier metal, a SiCH barrier dielectric, decarbonised Ni 2 Si and an ONO gate dielectric, and their effectiveness is experimentally verified. A viable device structure and fabrication process that successfully incorporate these measures are then presented. Finally, a storage life of more than 5380 hours at 300 °C is demonstrated for 1 × 1 mm 2 4H‐SiC power DMOS devices incorporating selected countermeasures. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)