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Magnetoresistive hybrid transistor in vertical architecture
Author(s) -
Meruvia M. S.,
Benvenho A. R. V.,
Hümmelgen I. A.,
Gomez J. A.,
Graeff C. F. O.,
Li R. W. C.,
Aguiar L. H. J. M. C.,
Gruber J.
Publication year - 2005
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.200521270
Subject(s) - transistor , materials science , optoelectronics , magnetoresistance , doping , silicon , common emitter , electron mobility , thin film transistor , layer (electronics) , semiconductor , base (topology) , electrical engineering , nanotechnology , magnetic field , engineering , voltage , physics , mathematical analysis , mathematics , quantum mechanics
We report the development of a hybrid semiconductor–metal–semiconductor permeable‐base transistor in vertical architecture, which operates by positive charge carrier transport. This transistor has a p‐type silicon collector, a thin tin layer as base and a conjugated polymer, poly(9,9‐dioctyl‐2,7‐ fluorenylenevinylene), as emitter material. The transistor transport characteristics are dependent on the applied magnetic field and the base transport factor for positive charge carriers is nearly ideal. (© 2005 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)