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III–V layer transfer onto silicon and applications
Author(s) -
Di Cioccio L.,
Jalaguier E.,
Letertre F.
Publication year - 2005
Publication title -
physica status solidi (a)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.532
H-Index - 104
eISSN - 1862-6319
pISSN - 1862-6300
DOI - 10.1002/pssa.200460411
Subject(s) - microelectronics , wafer , materials science , optoelectronics , substrate (aquarium) , silicon , layer (electronics) , wafer bonding , nanotechnology , engineering physics , engineering , oceanography , geology
Integration of GaAs and InP with Si technology presents a huge potential interest. When realised, it will combine the superior electrical and optical properties of GaAs and InP with the mechanical and economical advantages of Si, including large integration density. To obtain such hybrid structures, heteroepitaxial growth has been investigated extensively but, up to now, the resulting devices have limited performance due to a high density of threading dislocations. Bonding technologies have also been developed and III–V optical devices on Si have been already demonstrated. In this paper, we review the application of the Smart Cut TM technology which allows large diameter GaAs (or InP) thin film to be transferred onto a full silicon (handle) wafer. This technique is fully compatible with the requirements of microelectronics manufacturing and, both, HEMTs and P‐HEMTs structures have been realised. They exhibit electrical characteristics in close comparison to the prototype structures directly grown on a conventional GaAs or InP substrate. (© 2005 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)