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Cause analysis of the faults in HARC etching processes by using the PI‐VM model for OLED display manufacturing
Author(s) -
Park Seolhye,
Kyung Yunyoung,
Lee Juyoung,
Jang Yongsuk,
Cha Taewon,
Noh Yeongil,
Choi Younghoon,
Kim Byungsoo,
Cho Taeyoung,
Seo Rabul,
Yang JaeHo,
Jang Yunchang,
Ryu Sangwon,
Kim GonHo
Publication year - 2019
Publication title -
plasma processes and polymers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.644
H-Index - 74
eISSN - 1612-8869
pISSN - 1612-8850
DOI - 10.1002/ppap.201900030
Subject(s) - oled , materials science , passivation , bottleneck , etching (microfabrication) , optoelectronics , diode , process (computing) , computer science , nanotechnology , layer (electronics) , embedded system , operating system
High‐aspect ratio contact (HARC) etching is a bottleneck step of the high‐definition organic light emitting diode (OLED) display manufacturing processes. HARC process is frequently failed during the mass production, because this requires the high‐energy ion flux and the sidewall passivation, simultaneously. To analyze the cause of HARC process failures, plasma information (PI)‐based virtual metrology (VM) algorithm was developed by using the equipment engineering system and the optical emission spectroscopy data recorded from the fab. Developed PI‐VM could predict the process faults with >90% of the accuracy, and the cause analysis function was also validated. We could suggest a right solution to the failure, and more efficient management of the OLED display manufacturing was possible.