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Green scalable vapor texture etching for multicrystalline silicon wafers
Author(s) -
Sun PeiYu,
Tsai PiChen,
Liang PoYu,
Hsu HsiaoPing,
Sutejo Agustina,
Yang Allen,
Lan ChungWen
Publication year - 2020
Publication title -
progress in photovoltaics: research and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.286
H-Index - 131
eISSN - 1099-159X
pISSN - 1062-7995
DOI - 10.1002/pip.3302
Subject(s) - wafer , materials science , slicing , common emitter , etching (microfabrication) , silicon , texture (cosmology) , optoelectronics , nanotechnology , computer science , layer (electronics) , artificial intelligence , world wide web , image (mathematics)
In recent years, the low‐cost diamond‐wire (DW) slicing has been widely used for single‐crystalline silicon (sc‐Si) wafers, and this makes sc‐Si solar cells very attractive to the market. On the contrary, the adoption of DW slicing for multicrystalline (mc‐Si) wafers is troublesome because of poor texturing quality in the existing production lines using acid solutions. We have developed a vapor texture etching (VTE) process with the combination of both acid and reacted vapors for DW sliced mc‐Si wafers. The etching process was rather simple and low cost. More importantly, the acid usage was low and recyclable, so that the acid emission was low as well. Its scale‐up was easy and straightforward. In this lab‐scale reactor, more than 50 full‐size wafers could be processed each time. The etched wafers had uniform appearance and low reflectivity, around 10%. After the nanostructure pores were enlarged by post treatments to minimize surface recombination, the full‐size mc‐Si solar cell fabricated by Solartech could achieve an efficiency of 19.7% using the Passivated Emitter and Rear Contact (PERC) structure, which was comparable with the average production efficiency.