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Analysis and design of phase‐interleaving series‐connected module‐integrated converter for DC‐link ripple reduction of multi‐stage photovoltaic power systems
Author(s) -
Jung AnYeol,
Park JoungHu,
Jeon HeeJong
Publication year - 2013
Publication title -
progress in photovoltaics: research and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.286
H-Index - 131
eISSN - 1099-159X
pISSN - 1062-7995
DOI - 10.1002/pip.1260
Subject(s) - photovoltaic system , maximum power point tracking , ripple , computer science , converters , electrical engineering , voltage , electronic engineering , engineering , inverter
Recently, installation of photovoltaic power systems such as building‐integrated photovoltaic in urban area has been spotlighted in renewable energy engineering field, even at the expense of the performance degradation from partial shading. The efficiency degradation of maximum power point tracking (MPPT) performance can be compensated by a kind of power‐conditioning system architecture such as module‐integrated converters (MIC), which can handle the optimal‐operation tracking for its own photovoltaic (PV) module. In case of a MIC with series‐connected outputs, it is easy to obtain a high DC‐link voltage for multiple stage PV power conditioning applications. However, switching ripple of the DC‐link voltage also increases as number of the modules increases. In this paper, as a solution for the ripple reduction, interleaved pulse width modulation‐phase synchronizing method is applied to the PV MIC modules. The switching‐ripple analysis of the MPPT power modules were performed and compared between the cases such as phase control or not. For the implementation of the phase control among the modules, Zigbee (XBee Pro, Digi International, Minnetonka, MN, USA) wireless communications transceiver and DSP (TMS320F28335, Texas Instruments, Dallas, TX, USA) series communications interface are utilized. Hardware prototype of the double‐module boost‐type 80‐W MICs has been built to validate the DC‐link voltage ripple reduction. Copyright © 2012 John Wiley & Sons, Ltd.