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Clock synchronization using a linear process model
Author(s) -
Aweya James,
Montuno Delfin Y.,
Ouellette Michel,
Felske Kent
Publication year - 2005
Publication title -
international journal of network management
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.373
H-Index - 28
eISSN - 1099-1190
pISSN - 1055-7148
DOI - 10.1002/nem.583
Subject(s) - clock drift , transmitter , computer science , clock synchronization , timestamp , synchronization (alternating current) , digital clock manager , self clocking signal , clock domain crossing , clock skew , process (computing) , real time computing , algorithm , synchronous circuit , clock signal , telecommunications , jitter , channel (broadcasting) , operating system
In this paper, we present a clock synchronization scheme based on a simple linear process model which describes the behaviors of clocks at a transmitter and a receiver. In the clock synchronization scheme, a transmitter sends explicit time indications or timestamps to a receiver, which uses them to synchronize its local clock to that of the transmitter. Here, it is assumed that there is no common network clock available to the transmitter and the receiver and, instead, the receiver relies on locking its clock to the arrival of the timestamps sent by the transmitter. The clock synchronization algorithm used by the receiver is based on a weighted least‐squares criterion. Using this algorithm, the receiver observes and processes several consecutive clock samples (timestamps) to generate accurate timing signals. This algorithm is very efficient computationally, and requires the storage of only a small number of clock samples in order to generate accurate timing signals. Copyright © 2006 John Wiley & Sons, Ltd.