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A lockfree shared memory design for high‐throughput multicore packet traffic capture
Author(s) -
Zhanikeev Marat
Publication year - 2014
Publication title -
international journal of network management
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.373
H-Index - 28
eISSN - 1099-1190
pISSN - 1055-7148
DOI - 10.1002/nem.1866
Subject(s) - computer science , multi core processor , overhead (engineering) , throughput , network packet , parallel computing , computer network , computer architecture , operating system , wireless
SUMMARY Earlier study by this author has shown that traffic can be captured in multicore architectures with negligible overhead, thus introducing the topic of multicore parallelization into packet traffic analysis. Designs that involve locking or message passing are considered default in parallel processing, which is incompatible with packet traffic with its high throughput and small grain. This paper proposes a new design for shared memory which can be used by any number of processes completely lockfree. Analysis of processing overhead and C/C + + implementation of the design are presented. Copyright © 2014 John Wiley & Sons, Ltd.