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A 0.5 to 6 GHz wideband cascode LNA with enhanced linearity by employing resistive shunt‐shuntfeedback and derivative superposition
Author(s) -
Li Zhenrong,
Wang Simin,
Li Zhen,
Tang Hualian,
Zhuang Yiqi
Publication year - 2020
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.32435
Subject(s) - cascode , wideband , output impedance , linearity , electrical engineering , noise figure , amplifier , electronic engineering , impedance matching , inductor , electrical impedance , engineering , cmos , voltage
A wideband bipolar low‐noise amplifier (LNA) with enhanced linearity operating in 0.5 to 6 GHz frequency range is proposed in this letter. The LNA design is based on a cascode amplifier with an emitter degeneration RC parallel network and a resistive shunt‐shunt feedback which can improve linearity. The cascode topology in conjunction with the preceding series inductor L is utilized to achieve good wideband input impedance matching, while the wideband output impedance matching is realized by using an emitter follower as a buffer. And the third‐order input intercept point (IIP3) has been improved due to the derivative superposition technique. The wideband LNA presented in this letter was designed and implemented in a JAZZ 0.18 μm SiGe BiCMOS process. The measured results show that from 500 MHz to 6 GHz, the power gain ( S 21 ) is 16.5 to 17.1 dB, the noise factor (NF) is 2.7 to 3.3 dB, the current consumption without buffer stage is 12.4 mA at a 3.3 V supply voltage, and the IIP3 is −0.834 dBm at 2 GHz. The chip size is 1.06 × 0.64 mm 2 .