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A 1 V 25 to 30 GHz three‐stage linear CMOS power amplifier using driver stage RF predistortion technique
Author(s) -
Choi Sunkyu,
Kim HyeonJune,
Lee EunGyu,
Choi HanWoong,
Lim JeongTaek,
Kim ChoulYoung
Publication year - 2020
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.32419
Subject(s) - predistortion , amplifier , linearity , cmos , rf power amplifier , linear amplifier , dbc , power (physics) , dbm , power added efficiency , electrical engineering , radio frequency , electronic engineering , materials science , engineering , physics , quantum mechanics
Abstract This article presents a three‐stage 25 to 30 GHz linear CMOS power amplifier (PA) for fifth‐generation (5G) applications. In order to improve the linearity by compensating AM‐AM/AM‐PM distortion, we propose a driver stage RF predistortion technique in which a first drive amplifier (DA) operates in class C mode and a second DA operates in class A mode. By enhancing the linearity with the technique, the PA can be operated at more deep class‐AB bias condition with less back‐off. As a result, the efficiency of the PA at operating output power can thus be increased. The PA with the predistortion technique is designed and fabricated in bulk 65 nm 1 V CMOS process. The linear PA achieves 16.9 dBm P sat with 34.5% power‐added efficiency (PAE) and 15.9 dBm P 1dB with 32% PAE at 27 GHz. At an average power of 9.3 dBm, the PA achieves the EVM of −25 dBc and PAE of 11.4% at 27 GHz.