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Simulation and implementation of CMOS 8:1 LC ‐tank injection‐locked frequency divider
Author(s) -
Jang ShengLyang,
Ciou YouLiang
Publication year - 2020
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.32296
Subject(s) - inductor , capacitor , electrical engineering , transformer , cmos , frequency divider , resonator , materials science , lc circuit , optoelectronics , engineering , voltage
Abstract This letter simulates and measures a wide locking range LC ‐resonator injection‐locked frequency divider (ILFD) designed in the TSMC 0.18 μm process. The balanced‐injection 8:1 ILFD uses a current‐mode design method with one 2:1 p‐core LC sub‐ILFD and one 4:1 n‐core LC sub‐ILFD with wide locking range. The 4:1 sub‐ILFD uses a 5‐turn symmetric octagonal inductor and two 4‐turn inter‐wound transformers and parasitic capacitors to build the LC ‐resonator. The primary and the secondary inductors in the 1:1 transformer are identical for simple design. At the core power consumption 9.537 mW and at the incident power of 0 dBm, the measured 8:1 locking range is 1.11 GHz, from the incident frequency 16.83 to 17.94 GHz. The whole CMOS die occupies an area of 0.931 × 1.2 mm 2 . The simulated 8:1 sub‐ILFD also has wide locking range.