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Low group delay variation 3‐10 GH z 65 nm CMOS stacked power amplifier with 18.1 d B m peak 1 d B compression output power
Author(s) -
Polge David,
Ghiotto Anthony,
Kerhervé Eric,
Fabre Pascal
Publication year - 2018
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.30975
Subject(s) - wideband , amplifier , cmos , electrical engineering , power (physics) , transistor , group delay and phase delay , physics , materials science , voltage , telecommunications , engineering , quantum mechanics , filter (signal processing)
A 3‐10 GHz stacked power amplifier (PA) with low group delay variation and 18.1 dBm peak 1 dB compression output power (P 1dB ) in 65 nm CMOS bulk technology is presented. It is intended for ultra‐wideband or multiband telecommunication, sensing, and instrumentation systems operating in the 3‐10 GHz frequency range situated in the S, C, and X bands. Its design, based on stacked transistors allowing a supply voltage as high as 4 V to achieve a high 1 dB compression output power, is detailed. In the 3–10 GHz band, the proposed PA provides measured gain, P 1dB , and maximum power added efficiency (PAE max ) of 12.65 ± 1.25 dB, 16 ± 2.1 dBm, and 20.15 ± 7.55%, respectively. In addition, in its frequency range of operation, this PA achieves an excellent measured group delay variation of ±21.55 ps. To the authors’ knowledge, this wideband PA offers the lowest group delay variation in this frequency range of operation.