A 60 GHz semi‐distributed power combiner in 65 nm CMOS technology | Zendy

Shamsadini Shila | Zendy; Mousavi Pedram | Zendy; Moez Kambiz | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Premium

A 60 GHz semi‐distributed power combiner in 65 nm CMOS technology

Author(s) -

Shamsadini Shila,

Mousavi Pedram,

Moez Kambiz

Publication year - 2018

Publication title -

microwave and optical technology letters

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.304

H-Index - 76

eISSN - 1098-2760

pISSN - 0895-2477

DOI - 10.1002/mop.30970

Subject(s) - amplifier , cmos , distributed amplifier , antenna (radio) , electrical engineering , electronic engineering , power (physics) , topology (electrical circuits) , engineering , electric power transmission , computer science , physics , rf power amplifier , quantum mechanics

In this paper, a novel architecture of power combiner based on a distributed amplifier topology is proposed for 60 GHz phased‐array antenna systems. A multi‐input single‐output power combiner is constructed by removing the input transmission lines of a distributed amplifier, the input signal delays are equalized by adding input delay/matching networks so that the amplified input signals are added constructively at the combiner's output. Fabricated in 65 nm CMOS process, measured results show a maximum insertion loss of 1 dB, and input/output reflections losses of better than 12 dB over the entire band of 57 GHz to 64 GHz while consuming 67 mW (56 mA) from a 1.2V DC supply.

This content is not available in your region!

Continue researching here.

Having issues? You can contact us here

Accelerating Research