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A 45‐ to 57‐GHz low‐power amplifier in 90 nm bulk CMOS
Author(s) -
Su Guodong,
Sun Lingling,
Wen Jincai,
Liu Jun,
Gao Haijun,
Zhang Le
Publication year - 2017
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.30854
Subject(s) - amplifier , direct coupled amplifier , electrical engineering , rf power amplifier , linear amplifier , power added efficiency , fully differential amplifier , power bandwidth , cascade amplifier , fet amplifier , materials science , cmos , engineering , electronic engineering , operational amplifier
In this article, a novel two‐stage 45–57 GHz low‐power amplifier is presented and implemented in a 90‐nm bulk CMOS technology. The crossing‐capacitor neutralization technique is adopted to improve the gain and isolation of the amplifier. Meanwhile, the low‐loss transmission line and on‐chip transformer are designed for the matching networks. The measurement results show that the proposed amplifier achieves 3‐dB gain bandwidth of 12 GHz, from 45 to 57 GHz. The maximum small‐signal gain of this amplifier is 7.2 dB at 48.4 GHz, and the output 1‐dB compression power is −6.8 dBm at 48.4 GHz. This amplifier consumes total power of 5.52 mW under 1.2 V voltage supply.