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High linearity 3.0–5.0 GHz ultrawideband CMOS up‐conversion mixer with parallel capacitor
Author(s) -
Murad S. A. Z.,
Shahimin Mukhzeer Mohamad,
Md Isa Mohd Nazrin,
Ismail Rizalafande Che,
Ahmad Norhawati,
Yasin Mohd Najib Mohd
Publication year - 2015
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.28863
Subject(s) - linearity , cmos , frequency mixer , capacitor , electrical engineering , harmonic mixer , inductor , direct conversion receiver , microwave , radio frequency , intermediate frequency , signal (programming language) , electronic mixer , gilbert cell , materials science , electronic engineering , engineering , optoelectronics , telecommunications , voltage , computer science , noise figure , local oscillator , amplifier , detector , programming language
A high linearity CMOS up‐conversion mixer at 3.0–5.0 GHz for ultrawideband applications is presented. The proposed design is implemented in TSMC 0.18‐μm CMOS technology. A Gilbert‐cell active double‐balanced mixer using a capacitor placed in parallel with the intrinsic gate‐source capacitor of a core mixer to improve linearity is used. To further improve the linearity and input matching, source degeneration inductors is used. In addition, a current injection is designed to increase gain and obtain low power. A 100 MHz intermediate frequency input signal is converted to a 3.0–5.0 GHz radio frequency input signal. The measured input third‐order intercept point (IIP3) is 13.5 dBm with a convention gain of 2.3 dB. Moreover, a low power of 7.1‐mWwith a 1.2‐V power supply is obtained. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:427–429, 2015
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