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A V ‐band frequency quadrupler using subharmonic injection‐locked oscillator with push–push technique
Author(s) -
Zhang Bo,
Chou MinLi,
Huang FanHsiu
Publication year - 2014
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.28622
Subject(s) - frequency multiplier , injection locking , phase noise , electrical engineering , dbc , voltage controlled oscillator , harmonic mixer , microwave , signal (programming language) , local oscillator , high electron mobility transistor , frequency divider , materials science , optoelectronics , physics , engineering , telecommunications , optics , voltage , computer science , transistor , cmos , laser , programming language
A V‐band frequency quadrupler with high output power characteristic has been implemented and fabricated using 0.15 µm GaAs pHEMT technology. This quadrupler circuit is achieved by a second‐order subharmonic injection‐locked oscillator and a push–push frequency doubler as the output buffer. The free‐running oscillation frequency of the core oscillator is around 35 GHz with a tuning range of 3.25 GHz covering from 33.25 to 36.5 GHz. Using push–push circuit to be a frequency doubler under a proper bias condition, an optimized second harmonic signal can be accomplished with high harmonic suppression. The frequency of output signal in the quadrupler can present a wide tuning range from 66.5 to 73 GHz, and the maximum output power is −1.25 dBm with total dc consumption of 56 mW. With injecting a second‐order subharmonic signal into the core oscillator, the circuit exhibits an injection locking with an output locking range of about 1.6 GHz from 69.2 to 70.8 GHz. The output phase noise for 70‐GHz signal can be improved better than −105 dBc/Hz at 1 MHz frequency offset when the injected signal power is higher than 0 dBm. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:2473–2480, 2014