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A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique
Author(s) -
Sapawi Rohana,
Pokharel Ramesh K.,
Awang Mat Dayang Azra,
Kanaya Haruchi,
Yoshida Keiji
Publication year - 2012
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.27212
Subject(s) - linearity , amplifier , electrical engineering , return loss , cmos , broadband , linear amplifier , rf power amplifier , power added efficiency , power bandwidth , direct coupled amplifier , fully differential amplifier , electronic engineering , bandwidth (computing) , engineering , materials science , operational amplifier , telecommunications , antenna (radio)
A simple CMOS broadband power amplifier design with high linearity and good efficiency is proposed.The proposed power amplifier design employed stagger tuning technique that consist of two stages amplifier with different resonant frequencies to obtain a wider bandwidth from 0.9 to 3.5 GHz and low power consumption. To obtain high linearity self‐biased circuit is employed at the first stage of amplifier. The measurement results indicated that the proposed design achieves average gain of 8.5 dB, an input return loss (S 11 ) less than −3 dB and output return loss (S 22 ) less than −5 dB. High linearity, that is, IIP3 of 13.4 dBm at 2 GHz, power added efficiency of 34% is obtained while consuming 24.4 mW power from 1.5 V supply voltage. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2881:2884, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27212