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A V‐band low‐noise amplifier co‐designed with ESD network in 65‐nm RF CMOS
Author(s) -
Tsai MingHsien,
Hsu Shawn S. H.
Publication year - 2012
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.26623
Subject(s) - cmos , low noise amplifier , varicap , noise figure , electrical engineering , amplifier , electrostatic discharge , optoelectronics , microwave , noise (video) , materials science , power gain , engineering , physics , telecommunications , voltage , capacitance , computer science , electrode , quantum mechanics , artificial intelligence , image (mathematics)
A V‐band low‐noise amplifier (LNA) with electrostatic discharge (ESD) protection using RF junction varactors is demonstrated in a 65‐nm CMOS technology. The gate‐source junction varactor is used to achieve a power‐constrained simultaneous noise and input matching, and also as an auxiliary ESD protection for the NS and ND modes. The measured results shows an over 2.0‐kV ESD protection in the PD and PS modes, whereas the ESD level is enhanced up to 4.0 kV in the NS and ND modes. Under a power consumption of only 14.1 mW, the LNA demonstrates a noise figure (NF) of 5.2 dB and a peak power gain of 10.9 dB at 51 GHz, only a 0.8‐dB degradation for both NF and power gain compared with the reference design (LNA without ESD protection). © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:820–822, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26623