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A low‐power CMOS receiver for wireless sensor networks
Author(s) -
Chen YenJen,
Lin YuTso,
Liao FangRen,
Chen HsiaoChin,
Lu SheyShi
Publication year - 2009
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.24707
Subject(s) - demodulation , electrical engineering , voltage multiplier , cmos , microwave , electronic engineering , engineering , rectifier (neural networks) , voltage , wireless , sensitivity (control systems) , telecommunications , channel (broadcasting) , computer science , voltage regulator , stochastic neural network , machine learning , recurrent neural network , artificial neural network , dropout voltage
A monolithic on‐off keying receiver is presented for wireless sensor network applications. By employing the self‐mixing technique, the demodulator is constructed from a voltage multiplier instead of a rectifier in this work. The proposed receiver can achieve a data rate upto 1 Mb/s at a power consumption of 15.4 mW while occupying a die area of only 0.25 mm 2 . For a bit rate of 5 kb/s and a pseudo‐random sequence of 2 9 − 1, the receiver exhibits a sensitivity of −60 dBm at 433 MHz. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2618–2620, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24707
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