z-logo
Premium
A low‐power low‐phase‐noise 48‐GHz CMOS LC VCO for 60‐GHz dual‐conversion receiver
Author(s) -
Chang TienHung,
Chen ChangZhi,
Lin YoSheng,
Huang GuoWei
Publication year - 2009
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.24256
Subject(s) - phase noise , voltage controlled oscillator , dbc , cmos , electrical engineering , flicker noise , pmos logic , lc circuit , figure of merit , materials science , noise figure , engineering , optoelectronics , voltage , electronic engineering , transistor , amplifier , capacitor
In this article, a low‐power low‐phase‐noise 48‐GHz CMOS LC voltage‐control oscillator (VCO) using standard 0.13‐μm CMOS technology is reported. Low‐power consumption is achieved by maximizing the equivalent parallel resistance of the LC tank, while low‐phase‐noise is achieved by suppressing the up‐conversion of the flicker noise of the PMOS current source to 1/f 3 ‐shaped phase noise close to the carrier. The VCO dissipated 5.556 mW power, and achieved state‐of‐the‐art phase noise of −105 dBc/Hz at 1‐MHz offset from 47.85 GHz. The corresponding figure‐of‐merit (FOM) was −191.1 dBc/Hz, which is better than those of the reported CMOS LC VCOs around 48 GHz in the literature. The chip area was 0.94 × 0.9 mm 2 including the test pads. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 997–1000, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24256

This content is not available in your region!

Continue researching here.

Having issues? You can contact us here