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A 24‐GHz VCO using active FET frequency doubler in 0.18‐μm CMOS technology
Author(s) -
Chen X.S.,
Chen Y.T.,
Lu C.L.,
Chuang H.R.
Publication year - 2009
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.24238
Subject(s) - dbc , voltage controlled oscillator , phase noise , varicap , electrical engineering , cmos , frequency multiplier , voltage doubler , microwave , engineering , offset (computer science) , optoelectronics , materials science , electronic engineering , physics , voltage , telecommunications , computer science , capacitance , voltage reference , programming language , electrode , quantum mechanics , dropout voltage
In this article, a 24‐GHz VCO composed of a 12‐GHz VCO and an active frequency doubler is presented. This work is implemented by using the 0.18‐μm 1P6M CMOS process. The VCO and active frequency doubler with a 1.5 V supply consume 30 mA. The phase noise of measurement is −107.5 dBc/Hz and −123.1 dBc/Hz at 1‐MHz and 10‐MHz offset, respectively. A tuning range of 2.3 GHz is achieved by using varactor. The measurement shows a good efficiency of translation of frequency doubler and the oscillator has a good figure of merit (FOM) of −180 dBc/Hz. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 940–942, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24238
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