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Low power size‐efficient CMOS UWB low‐noise amplifier design
Author(s) -
Jhon HeeSauk,
Song Ickhyun,
Jeon Jongwook,
Koo MinSuk,
Park ByungGook,
Lee Jong Duk,
Shin Hyungcheol
Publication year - 2009
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.24104
Subject(s) - cmos , noise figure , electrical engineering , cascode , transconductance , low noise amplifier , microwave , inductor , electronic engineering , amplifier , engineering , materials science , transistor , telecommunications , voltage
The design and measurement results of 3–5 GHz fully integrated ultra‐wideband (UWB) CMOS LNA are presented. To boost the transconductance of the LNA and to reduce circuit area effectively, we eliminate a source degeneration inductor using resistive‐feedback cascode structure. The implemented UWB LNA shows peak gain of 10.8 dB, more than 10 dB of input return loss, and a noise figure of 3.3–4.2 dB from 3 to 5.1 GHz with power dissipation of 14 mW. The input P1dB and input IP3 (IIP3) at 4 GHz are about −6 dBm and +4 dBm, respectively. For low cost, the LNA has been fabricated using a 0.18‐μm thin metal CMOS process with top metal thickness of 0.84 μm. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 494–496, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24104