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Micromachined 50 GHz/60 GHz Phi filters by CMOS compatible ICP deep trench technology
Author(s) -
Huang PenLi,
Wang Tao,
Lin YoSheng,
Lu SheyShi,
Teng YuMing,
Huang GuoWei
Publication year - 2008
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.23915
Subject(s) - cmos , extremely high frequency , materials science , microwave , substrate (aquarium) , optoelectronics , etching (microfabrication) , rfic , inductor , trench , parasitic capacitance , capacitance , electrical engineering , filter (signal processing) , engineering , nanotechnology , telecommunications , chemistry , electrode , oceanography , layer (electronics) , voltage , geology
Micromachined 50 and 60 GHz millimeter‐wave filters were implemented by using a 0.18 μm CMOS technology. The CMOS‐compatible inductively coupled‐plasma (ICP) deep trench technology is used to selectively remove the silicon underneath the filters completely, and so the substrate loss of the filters can be significantly reduced. The results show that 3.2, 2.6, and 2.1 dB improvements in S 11 , S 21 , and G Amax , respectively, are achieved for the 60 GHz filter after the backside ICP etching. Besides, for the 50 GHz filter, a 295.8% (from 9.6 to 38) improvement in Q‐factor of its inductors is achieved. These results show that the backside ICP etching is effective to reduce the substrate loss and parasitic capacitance in the millimeter‐wave frequency bands, and hence is very promising for millimeter‐wave CMOS RFIC applications. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 3142–3146, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23915