Premium
A high gain, low noise WLAN receiver for dual if double downconversion application in 90‐nm RF CMOS
Author(s) -
Chang ChiehPin,
Hou JianAn,
Su Jionguang,
Chen JaHao,
Chen ChihWei,
Liou TsyrShyang,
Wong ShyhChyi,
Wang YeongHer
Publication year - 2007
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.22782
Subject(s) - noise figure , electrical engineering , cmos , radio frequency , port (circuit theory) , engineering , noise (video) , microwave , rf front end , intermediate frequency , electronic engineering , physics , telecommunications , amplifier , computer science , artificial intelligence , image (mathematics)
A high power gain, low noise WLAN receiver, using a 158 GHz f T 90‐nm RF CMOS technology for dual IF double downconversion system‐in‐package application is demonstrated. The proposed circuit could improve the design flexibility of back‐end stages due to its high power gain and low noise performances. The LNA and Mixer are biased at 1 V with 12.9 mA and 1.8 V with 5.5 mA, respectively. The proposed circuit delivers the double‐sideband noise figure of 2.68 dB, conversion gain of 36.24 dB, IIP3 of −25 dBm, IIP2 of 21.1 dBm, and LO‐IF isolation of −56.2 dB under the 1 dBm LO power, while maintaining the RF port and IF port return losses below −12.9 and −18.7 dB, respectively. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2422–2425, 2007; Published online in Wiley InterScience (www.interscience.wiley.com) DOI 10.1002/mop.22782