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A high‐performance 1–7 GHz UWB LNA using standard 0.18 μM CMOS technology
Author(s) -
Yen ShuHui,
Chen ChangZhi,
Lin YoSheng,
Chen ChiChen
Publication year - 2007
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.22780
Subject(s) - cmos , noise figure , electrical engineering , return loss , amplifier , low noise amplifier , wideband , ultra wideband , microwave , physics , bandwidth (computing) , optoelectronics , materials science , electronic engineering , engineering , telecommunications , antenna (radio)
In this article, we demonstrate a high‐performance 1‐ to 7‐GHz ultra‐wideband (UWB) low‐noise amplifier (LNA) for UWB system applications implemented in a standard 0.18 μm CMOS technology. This LNA can also be applied to 1.8/1.9‐GHz‐band GSM systems, and 2.4/4.9/5.2/5.7‐GHz‐band WLAN systems. The LNA consists of two cascaded stages, in which the pole of the first stage is cancelled by the zero of the second stage over the 1–7 GHz of interest. In addition, the inductive peaking technique is adopted in the second stage for bandwidth enhancement. This LNA achieved input return loss (S 11 ) of −10 to −15.3 dB, output return loss ( S 22 ) of −19.4 to −10.3 dB, voltage gain ( A V ) of 13.3 to 14.6 dB, reverse isolation ( S 12 ) of −37.7 to −27.1 dB over the 1‐ to 7‐GHz band of interest. The measured noise figure (NF) was 4.86–4.35 dB over the 2–8.5 GHz band. The measured 1‐dB compression point ( P 1dB ) and third‐order inter‐modulation point (IIP3) were −13.5 dBm and −3 dBm, respectively, at 6 GHz. The chip area was only 500 μm × 582 μm excluding the test pads. This LNA drained 10.4 mA current at supply voltage of 1.5 V, i.e. it only consumed 15.6 mW power. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2458–2462, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22780