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A CMOS power amplifier with an adaptive bias scheme for mobile radio frequency identification reader applications
Author(s) -
Han Jeonghu,
Kim Younsuk,
Park Changkun,
Lee Dongho,
Hong Songcheol
Publication year - 2007
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.22435
Subject(s) - rf power amplifier , amplifier , electrical engineering , linear amplifier , electronic engineering , power bandwidth , cmos , power added efficiency , radio frequency , engineering , transistor , voltage
A 900‐MHz linear power amplifier with an adaptive bias scheme is fabricated using a 0.25‐μm CMOS technology. The power amplifier operates over the range of 860–960 MHz, which is the ultrahigh‐frequency band for radio frequency identification (RFID). All matching networks and RF chokes are implemented on a chip. The developed power amplifier provides a 1‐dB‐gain‐compression point ( P 1 dB ) of 27 dBm and a power‐added‐efficiency (PAE) of 28% at the P 1 dB . The adaptive bias scheme enables the power amplifier to reduce the quiescent power consumption from 280 to 80 mW by adjusting the gate voltage of power transistors as a function of the input power. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 1241–1245, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22435