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Single‐ended frequency divider with moduli of 256–271
Author(s) -
Tseng ShengChe,
Meng Chinchun,
Li ShaoYu,
Su JenYi,
Huang GuoWei
Publication year - 2006
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.21876
Subject(s) - frequency divider , electrical engineering , current divider , wilkinson power divider , phase noise , cmos , engineering , colpitts oscillator , electronic engineering , frequency synthesizer , voltage divider , voltage controlled oscillator , phase locked loop , voltage , local oscillator , vackář oscillator
This paper demonstrates a low‐cost 2.4 GHz single‐ended frequency divider with the divide‐by‐value from 256 to 271 in the standard 0.35‐μm 2P4M CMOS technology. This frequency divider is composed of a synchronous current mode logic divide‐by‐4/5 prescaler, an asynchronous true single‐phase‐clock toggle flip‐flops divide‐by‐64 divider, and a digital control circuitry. This proposed divider is single‐ended and compatible to the single‐ended low‐phase‐noise Colpitts VCO. The operating frequency range of the divider is from 400 to 2.9 GHz. Most of the input sensitivity levels are about −10 dBm and the lowest level is −25 dBm at 2.4 GHz. Its core power consumption is about 28 mW. The chip size is 1.2 × 0.7 mm 2 . © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 2096–2100, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21876