Scalable distributed‐capacitance model for silicon on‐chip spiral inductors | Zendy

Huang Fengyi | Zendy; Lu Jingxue | Zendy; Jiang Nan | Zendy

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Scalable distributed‐capacitance model for silicon on‐chip spiral inductors

Author(s) -

Huang Fengyi,

Lu Jingxue,

Jiang Nan

Publication year - 2006

Publication title -

microwave and optical technology letters

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.304

H-Index - 76

eISSN - 1098-2760

pISSN - 0895-2477

DOI - 10.1002/mop.21642

Subject(s) - capacitance , inductor , cmos , microwave , chip , q factor , coupling (piping) , electronic engineering , scalability , electrical engineering , materials science , engineering , silicon , parasitic capacitance , optoelectronics , spiral (railway) , physics , computer science , resonator , mechanical engineering , telecommunications , electrode , quantum mechanics , voltage , database

We present physics‐based modeling for silicon on‐chip spiral inductors, taking into account the coupling capacitance between metal spirals. The coupling capacitance C p is calculated using a distributed‐capacitance model based on finite‐element analysis. As demonstrated for a series of inductors with the number of turns ranging from 2.5 to 6.5 fabricated in a 0.18‐μm CMOS technology, the current model provides simulation results for the quality factor Q, the S ‐parameter, and the self‐resonance frequency f SR that are in good agreement with the measurements without any fitting parameters. © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 1423–1427, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21642

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