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A parallel FET linearizer with complex capacitance
Author(s) -
Lo Wai Keung,
Chan Wing Shing,
Li Chung Wai
Publication year - 2005
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.20674
Subject(s) - linearizer , capacitance , microwave , linearization , diffusion capacitance , electrical engineering , optoelectronics , distortion (music) , electronic engineering , simple (philosophy) , engineering , materials science , computer science , physics , telecommunications , nonlinear system , predistortion , amplifier , philosophy , cmos , electrode , quantum mechanics , epistemology
Linearization of the gate‐source capacitance in a GaAs FET using a parallel reverse biased gate‐source junction and complex capacitance is proposed. This method offers a simple and low‐cost solution in reducing AM/PM distortion. An analysis for maximizing the performance of this linearizer is also presented. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 44: 485–487, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20674