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Zero‐temperature‐coefficient biasing point of a fully‐depleted SOI MOSFET
Author(s) -
Tan T. H.,
Goel A. K.
Publication year - 2003
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/mop.10920
Subject(s) - transconductance , silicon on insulator , mosfet , saturation current , biasing , saturation (graph theory) , materials science , temperature coefficient , condensed matter physics , electrical engineering , voltage , optoelectronics , physics , transistor , engineering , silicon , mathematics , combinatorics
The gate characteristics ( I D – V GS ) of fully depleted, lightly doped, enhanced SOI n ‐MOSFET are simulated over a wide range of operating temperature (300–600 K) by using the SILVACO TCAD tools. Simulation results show that there exists a biasing point where the drain current and the transconductance are temperature independent. Such a point is known as the zero‐temperature coefficient (ZTC) bias point. The drain‐current ZTC points are identified in both the linear and saturation regions. The transconductance ZTC exists only in the saturation region. © 2003 Wiley Periodicals, Inc. Microwave Opt Technol Lett 37: 366–370, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.10920