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Design of a 10 W high‐efficiency balanced power amplifier using a combination of load‐pull and load‐line methods for ISM band
Author(s) -
Mehraban Haniye,
Farazmand Amir A.,
Ahmadi Arash
Publication year - 2020
Publication title -
international journal of rf and microwave computer‐aided engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.335
H-Index - 39
eISSN - 1099-047X
pISSN - 1096-4290
DOI - 10.1002/mmce.21984
Subject(s) - amplifier , load pull , output impedance , capacitance , transistor , input impedance , electrical engineering , impedance matching , active load , harmonic , electrical impedance , current source , electronic engineering , engineering , acoustics , physics , voltage , cmos , quantum mechanics , electrode
In this article, a 10 W power amplifier has been designed and constructed at 2.4 GHz. The source and load‐pull impedance data published by the manufacturer at a nearby frequency of 2.5 GHz have been adopted to power match the transistor at the intended design frequency. For this purpose, the linear model of the GaN transistor has been derived from the S‐parameter data. The load‐line at the dependent current source plane and the impedance at the intrinsic gate‐source capacitance have been simulated in the presence of the source and load‐pull impedances at 2.5 GHz. The extracted impedances have been retained in the design of the power amplifier at 2.4 GHz. In a novel approach, the input and output matching circuits interacted with the linear model of the transistor to provide the same load‐line conditions at the virtual drain plane and the intrinsic gate‐source capacitance plane. In contrast to conventional load‐pull methods that give no information about the harmonic terminations, harmonic terminations can be easily controlled in this method. The insight into the transistor linear model allows the harmonic terminations at the virtual drain plane to be set to low values for proper class‐B operation.