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Efficiency‐enhanced Doherty power amplifier using Chireix‐like compensation technology
Author(s) -
Zhang Zhiwei,
Cheng Zhiqun,
Liu Guohua,
Ke Huajie,
Sun Hao,
Gao Steven
Publication year - 2019
Publication title -
international journal of rf and microwave computer‐aided engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.335
H-Index - 39
eISSN - 1099-047X
pISSN - 1096-4290
DOI - 10.1002/mmce.21949
Subject(s) - predistortion , adjacent channel , amplifier , dbc , high electron mobility transistor , materials science , electrical engineering , transistor , compensation (psychology) , adjacent channel power ratio , leakage (economics) , optoelectronics , offset (computer science) , electronic engineering , engineering , computer science , cmos , voltage , economics , macroeconomics , programming language , psychology , psychoanalysis
This article presents a novel efficiency‐enhanced Doherty power amplifier (DPA) by using a Chireix‐like compensation technique. This technique introduces a compensation circuit structure at the combiner to offset the phase difference effect of a DPA for enhancing drain efficiency. A DPA based on the proposed structure is fabricated with two 10 W GaN high electron mobility transistor (HEMT) transistors. The fabricated DPA with such proposed compensation structure manifests a measured saturated output power of 43.5 dBm and drain efficiency of 68% to 71% in the frequency range of 3.2 to 3.7 GHz. Forty‐five percent of drain efficiency can be achieved at 6 dB power back‐off. And the adjacent channel leakage ratio (ACLR) is better than −48.6 dBc with digital predistortion.