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Microwave modeling and parameter extraction method for multilayer on‐chip inductors
Author(s) -
Gao Jianjun,
Yang Chen
Publication year - 2013
Publication title -
international journal of rf and microwave computer‐aided engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.335
H-Index - 39
eISSN - 1099-047X
pISSN - 1096-4290
DOI - 10.1002/mmce.20678
Subject(s) - inductor , microwave , chip , equivalent circuit , electronic engineering , materials science , optoelectronics , computer science , topology (electrical circuits) , engineering , electrical engineering , telecommunications , voltage
A new equivalent circuit model for 3D multilayer on‐chip inductors based on physical principles is presented in this article. The model consists of multiple elementary cells, and every cell in the distributed model represents a single stacked inductor. The model also takes into account the distributed effect of the via‐hole with feedline which is used to connect the test pad to the lowest mental layer. A parameter‐extraction approach for proposed model which combines the analytical approach and empirical optimization procedure is investigated. Good agreement is obtained between simulated and measured results for a six metal layers on‐chip inductor on silicon in the frequency range of 50 MHz to 20 GHz. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2013.