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Design and analysis of a WLAN CMOS power amplifier using multiple‐gated transistor technique
Author(s) -
Liu Hang,
Boon Chirn Chye,
Do Manh Anh,
Yeo Kiat Seng
Publication year - 2011
Publication title -
international journal of rf and microwave computer‐aided engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.335
H-Index - 39
eISSN - 1099-047X
pISSN - 1096-4290
DOI - 10.1002/mmce.20499
Subject(s) - amplifier , transistor , rf power amplifier , electrical engineering , common source , fet amplifier , linear amplifier , linearity , direct coupled amplifier , cmos , common gate , electronic engineering , dbm , power added efficiency , materials science , computer science , engineering , voltage , operational amplifier
This article focused on 5.2 GHz highly integrated power amplifier for IEEE 802.11a WLAN application. Multiple‐gated transistor technique was used to improve linearity. A new approach for choosing the bias voltage of auxiliary transistor by analyzing the shift of gate bias is used in the design. The simulated results of the proposed two‐stage differential power amplifier indicate 25.28 dBm P 1‐dB , 32.87% PAE, and 26.18 dBm saturated output power with a 5.2 dB P 1‐dB improvement compared to conventional single transistor amplifier. © 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2011.