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CMOS stacked folded differential structure power amplifier for high power RF application
Author(s) -
Luque Yohann,
Kerhervé Eric,
Deltimple Nathalie,
Leyssenne Laurent,
Belot Didier
Publication year - 2010
Publication title -
international journal of rf and microwave computer‐aided engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.335
H-Index - 39
eISSN - 1099-047X
pISSN - 1096-4290
DOI - 10.1002/mmce.20465
Subject(s) - amplifier , cmos , dbm , rf power amplifier , power (physics) , electrical engineering , linearity , power gain , power bandwidth , topology (electrical circuits) , electronic engineering , linear amplifier , power added efficiency , materials science , engineering , physics , quantum mechanics
This article describes the feasibility of a Power Amplifier (PA) in 0.13 μm CMOS technology from STMicroelectronics for high power applications. To obtain a high output power with a good linearity, a new topology called Stacked Folded Differential Structure (SFDS) is proposed. It allows obtaining similar power performances to a PA with DAT in a lower die area. This PA provides 23 dBm of maximum output power ( P max ) with 20% of power added efficiency (PAE) at 1.95 GHz. The linear gain is equal to 11 dB and the output power at 1 dB compression point (OCP 1 ) achieves 21 dBm. © 2010 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010.