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Wafer‐scale monolithic hybrid integration of Si ‐based IC and III–V epi‐layers—A mass manufacturable approach for active matrix micro‐ LED micro‐displays
Author(s) -
Zhang Lei,
Ou Fang,
Chong Wing Cheung,
Chen Yijing,
Li Qiming
Publication year - 2018
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1002/jsid.649
Subject(s) - active matrix , wafer , materials science , integrated circuit , chip , optoelectronics , computer science , nanotechnology , computer hardware , telecommunications , layer (electronics) , thin film transistor
Hybridization of silicon integrated circuits (ICs) with compound semiconductor device arrays are crucial for making functional hybrid chips, which are found to have enormous applications in many areas. Although widely used in manufacturing hybrid chips, the flip‐chip technology suffers from several limitations that are difficult to overcome, especially when the demand is raised to make functional hybrid chips with higher device array density without sacrificing the chip footprint. To address those issues, Beida Jade Bird Display Limited has developed its unique wafer‐level monolithic hybrid integration technology and demonstrated its advantages in making large‐scale hybrid integration of functional device arrays on Si IC wafers. Active matrix micro‐light‐emitting diode micro‐displays with a resolution of 5000+ pixel per inch were successfully fabricated using Beida Jade Bird Display Limited's monolithic hybrid integration technology. The general fabrication method is described, and the result is presented in this paper. The fabricated monochromatic micro‐light‐emitting diode micro‐displays exhibit improved device performance than do other micro‐display technologies and have great potentials in applications such as portable projectors and near‐to‐eye projection for augmented reality. More importantly, the wafer‐scale monolithic hybrid integration technology offers a clear path for low‐cost mass production of hybrid optoelectronic IC chips.